Corporate Events

From April 25, 2025 to June 30, 2025, the company has repurchased 2,212,800 shares, representing 0.3% for ¥15,446.79 million. With this, the company has completed the repurchase of 2,212,800 shares, representing 0.3% for ¥15,446.79 million under the buyback announced on April 25, 2025.

Advantest Corporation, Board Meeting, Apr 25, 2025. Agenda: To consider Status of Share Repurchase.

Advantest Corporation, Board Meeting, May 22, 2025. Agenda: To consider and resolve to submit a proposal for partial amendment of the Articles of Incorporation to the 83 Ordinary General Meeting of Shareholders of the Company to be held on June 27, 2025; and to consider any other matters.

Advantest Corporation will feature its latest test solutions at SEMICON Southeast Asia 2025 on May 20-22 at the Sands Expo and Convention Centre in Singapore. Located in Hall A on Level 1 at Booth #L1511, Advantest will showcase a wide range of solutions that address the technology challenges in the era of complexity. Through this broad product portfolio, Advantest can cater to diverse customer needs, optimizing efficiency to enable critical applications like high-performance computing (HPC), AI, automotive, and 5G/IoT, while supporting crucial technologies such as silicon photonics, high-bandwidth memory (HBM) and 2.5D/3D packaging. Advantest's product highlights will include: NEW SiConic, a scalable solution for automated silicon validation. Designed to address the increasing complexity of advanced systems-on-chip (SoCs), SiConic enables design verification (DV) and silicon validation (SV) engineers to achieve faster sign-off with unparalleled reliability, efficiency and collaboration. Solutions for the V93000 EXA Scale test system, including the Wave Scale RF20ex high-bandwidth RF IC test card, the PMUX02 advanced power multiplexer, the DC Scale XHC32 ultra-high-current power supply card, and the high-speed Pin Scale Multilevel Serial HSIO instrument. Extending the V93000 test system's capabilities to support high-volume production of silicon photonics and co-packaged optics devices via a partnership with FormFactor. The HA1200 die-level handler that can be linked with a tester to utilize Advantest's unique active thermal control technology to test singulated and/or partially assembled dies. ACS Real-Time Data Infrastructure (ACS RTDI™?), a solution platform that automates the process of converting insights into actionable production steps within the same test insertion in milliseconds, optimizing yield, improving quality and reducing time to market. ACS Gemini™? software development platform, which acts as the digital twin to ACS RTDI™? to allow customers to develop, simulate and debug machine learning applications in a virtual environment. NEW Advantest Power Optimization Solution (APOS), a software solution designed to optimize the power management during the V93000 tester's power-on period. It enables foundries and outsourced semiconductor assembly and test (OSAT) providers to achieve their sustainability goals while reducing operational costs.

Advantest Corporation unveiled SiConic Test Engineering (TE), the newest addition to the SiConic family introduced in February 2025. SiConic TE offers test engineers the ability to bring up and validate structural and functional tests over high-speed I/O (HSIO) interfaces in a scalable bench environment, enabling earlier validation and debug without occupying valuable ATE systems. SiConic Link flexibly connects to standard evaluation boards through functional interfaces like USB, PCIe, control interfaces, and GPIOs. This is the foundation for SiConic TE to enable test engineers to rapidly validate and debug design verification (DV) and design for test (DFT) content in SiConic's unified environment on the bench. Building on the V93000 test system's leadership in scan over USB or PCIe, SiConic's unified environment brings native DV test content to test engineering without the error-prone and lengthy conversion and debug cycles typical for bring-up of advanced functional tests on ATE. Integrating seamlessly with SiConic Link hardware and the SmarTest 8 software platform, SiConic TE provides users with comprehensive access to functional HSIO links for enhanced throughput and rich trace capabilities during test execution. By enabling smoother handoffs between silicon validation (SV), DV and TE teams, SiConic TE fosters tighter cross-domain collaboration. Through its unified test environment and shared ecosystem, SiConic TE improves the correlation between bench, ATE and SLT systems. The tool's optimized engineering resources allow bring-up and debug to be offloaded from ATE to the bench, freeing up valuable tester capacity and enabling more effective scaling. In addition, tight integration with leading EDA partners enables cross-functional collaboration with leading EDA partners enables Cross-functional collaboration with DV and DFT teams, improving test content development and speeding first-silicon success. Advantest developed SiConic TE in close collaboration with leading customers and EDA partners to ensure seamless integration into existing design and validation flows.

Advantest Corporation, Annual General Meeting, Jun 27, 2025.

The Board of Directors of Advantest Corporation has authorized a buyback plan on April 25, 2025.

Advantest Corporation (TSE:6857) announces a share repurchase program. Under the program, the company will repurchase up to 19,000,000 shares, representing 2.59% of outstanding shares for ¥70,000 million. The company will repurchase its shares for the purpose of shareholder returns and for improving capital efficiency. The program will expire on September 22, 2025. As of March 31, 2025, the company had 733,719,025 shares in outstanding and 32,422,231 shares in treasury.

Advantest Corporation, 2025 Earnings Call, Apr 25, 2025

Advantest Corporation, Board Meeting, Mar 28, 2025. Agenda: To submit a proposal for the election of six Directors (excluding Directors who are Audit and Supervisory Committee members) and a proposal for the election of two Directors who are Audit and Supervisory Committee members.

Advantest Corporation will showcase its latest test solutions at SEMICON China 2025 on March 26-28 at the Shanghai New International Expo Centre in Shanghai. Advantest will highlight its broad portfolio of test technology for applications, including advanced memory, automotive, RF wireless communications and CMOS image sensors. Advantest will be located at booth #4431 in Hall N4. This year's digital display will feature key test solutions that enable innovation and technology essential to daily lives, including: NEW T5801 Ultra-High-Speed DRAM test system, engineered to support the latest advancements in high-speed memory technologies, including GDDR7, LPDDR6 and DDR6. NEW solutions for the V93000 EXA Scale test system, including the Wave Scale RF20ex high-bandwidth RF IC test card, the PMUX02 advanced power multiplexer, the DC Scale XHC32 ultra-high-current power supply card, and the high-speed Pin Scale Multilevel Serial HSIO instrument. T2000 SoC test systems with Rapid Development Kit (RDK) for all SoCs, including automotive, power analog and CMOS image sensors. T6391 test system for high-speed, high-accuracy and high-voltage measurement demands to test emerging display driver ICs. ACS TE-Cloud™?, a one-stop test engineering solution platform, offering a complete test development environment with an integrated set of software tools for V93000 test program development. ACS Real-Time Data Infrastructure (ACS RTDI™?), a solution platform that automates the process of converting insights into actionable production steps within the same test insertion in milliseconds, optimizing yield, improving quality and reducing time to market.

Advantest Corporation announced that they will report fiscal year 2025 results on Apr 25, 2025

Powertech Technology Inc. has announced a purchase order for machinery equipment and spare parts on behalf of its subsidiary, Tera Probe Inc. The transaction involves a total price of TWD 592,414,012 and is conducted with Advantest Corporation. The equipment is intended for production operations.

Micronics Japan Co., Ltd. announced a private placement to issue 150,000 treasury shares at issue price of ¥4,154 per share for gross proceeds of ¥623,100,000 on February 27, 2025. The transaction includes participation from new investor, Advantest Corporation. The transaction will happen through third party allocation. The issue date will be March 17, 2025.. The transaction has been approved at board of director meeting of the company. The company will bear issuance expenses of ¥2,700,000 and will receive net proceeds of ¥620,400,000.

Advantest Corporation will showcase its latest test solutions at IESA Vision Summit 2025 on March 5-7 at the Mahatma Mandir, Convention and Exhibition Centre in Gandhinagar, Gujarat, India. Advantest will highlight its broad portfolio of leading-edge test technology for applications, including advanced memory, automotive, artificial intelligence (AI) and high-performance computing (HPC). The IESA Vision Summit is the premier platform dedicated to advancing India's semiconductor and electronics ecosystem, bringing together industry leaders, government policymakers, innovators and experts to discuss cutting-edge technologies, emerging trends and transformative collaborations. As a global leader in providing semiconductor test solutions, Advantest is eager to show its support for India's emerging semiconductor industry. The company is a gold sponsor for this year's event. Product Displays: Advantest will be located at booth #212 in Hall 1. This year's digital display will feature key test solutions that enable innovation and technology essential to daily lives, including: NEW SiConic, a scalable solution for automated silicon validation. Designed to address the increasing complexity of advanced systems-on-chip (SoCs), SiConic enables design verification (DV) and silicon validation (SV) engineers to achieve faster sign-off with unparalleled reliability, efficiency and collaboration. NEW solutions for the V93000 EXA Scale test system, including the Wave Scale RF20ex high-bandwidth RFIC test card, the DC Scale XHC32 ultra-high-current power supply card and the high-speed Pin Scale Multilevel Serial HSIO instrument. NEW T5801 Ultra-High-Speed DRAM test system, engineered to support the latest advancements in high-speed memory technologies - including GDDR7, LPDDR6 and DDR6 - critical to meeting the growing demands of artificial intelligence (AI), high-performance computing (H PC) and edge applications. Instruments for the V93000EXA Scale test system that enable the testing of power and analog devices, such as battery management systems (BMS), automotive and power ICs, including the new PMUX02 advanced power multiplexer and the Pin Scale 5000 digital card.

Advantest Corporation unveiled SiConic: a scalable solution for automated silicon validation. Designed to address the increasing complexity of advanced systems-on-chip (SoCs), SiConic enables design verification (DV) and silicon validation (SV) engineers to achieve faster sign-off with unparalleled reliability, efficiency and collaboration. Debuting next week at DVCon in San Jose, Calif., SiConic signals Advantest’s commitment to transforming the R&D process for its customers. The semiconductor industry is facing unprecedented challenges. Growing SoC design complexity, together with the adoption of 3D packaging and heterogeneous integration, is straining traditional validation workflows. DV and SV teams are under pressure to reduce time-to-market and time-to-quality – even as more devices with more intricate features are being developed within constrictive timelines. Reusing the wealth of verification content developed in pre-silicon would provide an efficiency and quality breakthrough. However, the industry lacks the automated flow and tools to reliably re-use and extend verification tests for silicon validation. SiConic’s ecosystem – including EDA partners such as Cadence, Siemens and Synopsys – overcomes this barrier to reuse, enabling engineering efficiency and accelerated test execution on real silicon. SiConic Explorer, the platform’s software backbone, offers an automated flow by integrating seamlessly with EDA verification tools based on the Accellera Portable Test and Stimulus Standard (PSS), e.g., the Cadence Perspec System Verifier. In addition, integration with debuggers, such as Lauterbach’s TRACE32 debugging tool, accelerates the bring-up of complex multi-IP test cases. SiConic Link is the hardware foundation of the SiConic solution on a bench. With its high-speed I/O (HSIO) capability, SiConic Link supports protocols such as PCIe and USB to enable functional validation with high throughput and rich tracing capabilities during test execution. The test instrument provides control interfaces (e.g., JTAG, SPI) and general-purpose I/Os, improves the debugging workflow and provides extensive control and observability of the device in its target board environment. With SiConic, DV engineers can now leverage familiar pre-silicon techniques, expanding their functional coverage in post-silicon. Similarly, SV engineers benefit from seamless load, set parameters and debug of PSS-based or manually directed content on silicon, thereby enabling rapid and reliable device bring-up and functional characterization. The highly portable solution can be easily scaled for use by distributed global R&D teams collaborating on a complex SoC with diverse IP blocks. SiConic enables confident sign-off decisions through team collaboration and data-driven insights – building trust with customers receiving early samples and expecting reliable ramp and operation during the lifetime of their systems. Leading Advantest IC customers and EDA partners are already working with SiConic and seeing the benefits of its performance and productivity advantages.

Advantest Corporation Presents at SEMICON Korea 2025, Feb-19-2025 01:55 PM. Venue: COEX Seoul, Seoul, South Korea. Speakers: Ira Leventhal, Vice President of Applied Research, Advantest America.

Advantest Corporation will showcase its latest test solutions at SEMICON Korea 2025 on Feb. 19-21 at COEX in Seoul, South Korea. Advantest will highlight its broad portfolio of test technology for applications, including advanced memory, 5G, artificial intelligence (AI) and high-performance computing (HPC). In addition, as one of the founding members of SEMI's Semiconductor Climate Consortium (SCC), the company plans to promote its ESG initiatives at this year's show.

Advantest Corporation announced the T5801 Ultra-High-Speed DRAM Test System. The cutting-edge platform is engineered to support the latest advancements in high-speed memory technologies – including GDDR7, LPDDR6, and DDR6 – critical to meeting the growing demands of artificial intelligence (AI), high-performance computing (HPC) and edge applications. Increasingly complex, high-speed memory technologies are pushing the boundaries of data center and AI performance. The T5801 is tailored to address this challenge by enabling accurate and efficient mass production testing for the highest-speed memory devices. Featuring an innovative Front-End Unit (FEU) architecture, the system is uniquely equipped to handle the rigorous requirements of next-generation DRAM modules, delivering industry-leading performance of up to 36Gbps PAM3 and 18Gbps NRZ. The T5801 builds on Advantest’s market leadership in DRAM test solutions, including the proven T5503 series and V93000HSM systems. Its support for PAM3, a first in JEDEC-standard DRAMs, highlights the system’s capacity to handle memory innovations such as GDDR7, which is central to achieving ultra-low latency in all AI environments. Its scalable testing infrastructure enables a seamless transition from engineering R&D to production, offering flexible configurations and full compatibility with existing handlers and interfaces. Already in use by strategic memory customers, the T5801 DRAM test system will be released to the global market early next year. To learn more about the ultra-high-speed T5801, as well as Advantest’s full line of automated test equipment and materials, visit booth P201 at SEMICON Korea 2025, February 19-21, at COEX in Seoul, South Korea. Note to Editors: GDDR7 = Graphics Double Data Rate 7; LPDDR6 = Low Power Double Data Rate 6; DDR6 = Double Data Rate 6; PAM3 = Pulse Amplitude Modulation 3.

Advantest Corporation, ¥ 20.0, Cash Dividend, Mar-28-2025

Advantest Corporation expected to report Fiscal Year 2025 results on April 25, 2025. This event was calculated by S&P Global (Created on January 29, 2025).

From January 1, 2025 to January 28, 2025, the company has repurchased 1,829,100 shares, representing 0.25% for ¥15,980.58 million. With this, the company has completed the repurchase of 5,711,000 shares, representing 0.77% for ¥50,000 million under the buyback announced on October 30, 2024.

The company closed its plan on January 28, 2025.

Advantest Corporation, Q3 2025 Earnings Call, Jan 29, 2025

From October 30, 2024 to December 31, 2024, the company has repurchased 3,881,900 shares, representing 0.53% for ¥34,019.42 million. With this, the company has completed the repurchase of 3,881,900 shares, representing 0.53% for ¥34,019.42 million under the buyback announced on October 30, 2024.

Advantest Corporation announced that they will report Q3, 2025 results on Jan 29, 2025

Advantest Corporation announced an integrated test cell designed to maximize die-level test yields for wide-bandgap (WBG) devices essential to power semiconductors. The Advantest Known Good Die (KGD) Test Cell combines the company’s CREA MT series power device testers with the new HA1100 die prober. Demand for power semiconductors continues to grow with the rapid escalation of electric vehicles (EV) and power infrastructure. WBG devices, particularly silicon carbide (SiC) and gallium nitride (GaN), are essential for the design and manufacture of power semiconductors, enabling them to be smaller, faster and more efficient than silicon-based devices. However, screening for failures in WBG devices is challenging, as the probe card, chuck and devices can be damaged due to the high voltage and current at which they operate. Essentially serving as a one-stop shop for efficient equipment management, the Advantest KGD test cell solution helps reduce customers’ manufacturing costs. CREA’s proprietary probe card interface (PCI) technology can eliminate damage risk. However, if damage does occur, Advantest can investigate it using the test cell, allowing customers to minimize downtime. The HA1100 die prober for the CREA MT series test systems enables the assembly of dies in power modules using only passed (KGD) die, ensuring no failed die find their way into the module. This prevents yield loss at module test, thus reducing the loss of final multi-die assembled power modules. Currently under development, the HA1100 die prober will be released to the global market in the second quarter of 2025.

Advantest Corporation announced the launch of its new software development platform ACS Gemini, which allows customers to develop, simulate and debug machine learning applications in a virtual environment. The digital twin of ACS RTDI, ACS Gemini is part of Advantest’s mission to enable customers and partners to utilize data analytics in developing artificial intelligence (AI) and machine learning (ML) solutions for semiconductor testing. In recent years, manufacturing costs for semiconductors have increased significantly due to their growing complexity. Analysts at McKinsey & Company predict that implementing AI and ML could lower manufacturing costs by 40%, as many engineers use these technologies to optimize efficiency in manufacturing. ACS Gemini improves efficiency by providing customers with a seamlessly integrated experience that optimizes design-to-production proficiency in the virtual ACS RTDI environment. The digital twin software solution is composed of the ACS Software Development Kit, Reference Application Development Model, and Containerized applications publishable to the ACS Container Hub™. These elements enable customers to simulate valuable test results in a virtual production setting. ACS Gemini saves customers time and cost in engineering debugging, design vs. production correlation, and cloud deployment of apps – ultimately saving valuable tester time. Overall, the solution accelerates ML application development, simulates testing results, and shortens the time-to-deployment of ML applications on the production test floor. Advantest’s ACS RTDI is a real-time data infrastructure platform-as-a-service that securely collects, analyzes, stores and monitors semiconductor test data to empower customers to automate the process of converting insights into actionable test decisions within milliseconds. This helps customers and partners reduce test time, optimize quality and reliability and enhance smart packaging. The solution will be available to the global market in early 2025.

Advantest Corporation Presents at Executive Conference on the power of AI, Dec-12-2024 . Venue: St. Regis Hotel, San Francisco, California, United States. Speakers: Ken Butler, Senior Director Applications Marketing.

Advantest Corporation announced a new power multiplexer developed specifically for use on the V93000 EXA Scale SoC test platform. The PMUX02 Power MUX offers unprecedented capabilities for multi-site testing of power and analog devices, including battery management systems (BMS), automotive, and power management ICs. With 22 switches – nearly double the switch density of its predecessor – and an extended voltage range of ±160 volts (V), PMUX02 will help streamline and reduce the cost-of-test for these high-pin-count, mixed-signal devices. A power mux switches between multiple power sources and instruments to provide uninterrupted power and measurement to devices under test (DUTs). Electric vehicles (EVs) are a key driver behind the need for advanced power muxes. Increasing the number of cells stacked in an EV’s battery module improves its efficiency, and stacks of 24+ cells require the BMS to operate at 150V or higher. Moreover, as automotive ICs become increasingly complex with higher pin counts, more parallel sites are required to increase throughput, requiring more multiplexers. PMUX02 provides a denser array of relays in the test head and uses the system bus for communication, eliminating I2C driver circuitry and freeing up valuable loadboard space. Up to 16 PMUX02 cards can be installed in an EXA Scale system; the exact number depends heavily on the specific customer application and site count. An optional air cooling kit is also available. PMUX02 is fully compatible with its predecessor, PMUX01, enabling customers to utilize the same loadboards for their applications. In addition, PMUX02 is integrated into Advantest’s SmarTest 8 control software environment and takes advantage of the same powerful routing tools as PMUX01—which is crucial for agile application development. Customers are already harnessing the power of the PMUX02 Power MUX for BMS and power management IC projects. The PMUX02 will be available to the global market beginning in early 2025.

IR Technical Briefing

Advantest Corporation unveiled the Wave Scale RF20ex instrument for the V93000 EXA Scale platform. It enables customers to test virtually any type of radio frequency (RF) device using a single instrument. Wave Scale RF20ex takes the innovations of the V93000 Wave Scale RF solution to a new level, providing double the number of RF ports per instrument and offering future-proof frequency and bandwidth coverage with a frequency range of 100MHz to 20GHz and a leading 2GHz bandwidth capability. It is well equipped to address 5G, Wi-Fi 7, ultra-wideband (UWB) and any other current or future standards in RF. As semiconductors continue to evolve toward higher performance, technology convergence and complexity, a broader and more integrated test solution is needed. The new Wave Scale RF20ex provides a unified, single-card solution for all standard RF applications. For UWB applications, Wave Scale RF20ex on the V93000 platform enables ATE for a new class of devices that are more demanding in their testing requirements in terms of modulation bandwidth and frequency coverage while driving higher levels of multi-site test and lower cost-of-test (CoT). Wave Scale RF20ex Key Features: The Wave Scale RF20ex card offers a wealth of features and benefits engineered by Advantest RF test experts, including: 64 bi-directional ports per card; 100MHz - 20GHz coverage on all ports and 2GHz of instantaneous bandwidth for stimulus and measurement. The new Wave Scale RF20ex card is already in use at several customer sites and will be broadly available in December 2024.

FormFactor, Inc. and Advantest Corporation announced a strategic partnership to develop a novel test cell and measurement system designed for high-volume production of silicon photonics (SiPh) and co-packaged optics (CPO) devices. This collaboration is driven by the revolution in AI data center architectures, which require ever-increasing bandwidth while reducing power consumption. Silicon photonics is rapidly gaining traction in data centers for its ability to enable fast data transmission through optical signals, surpassing traditional electrical methods. This new test cell integrates the latest innovations from both companies, equipping photonics device developers with the tools they need to scale up volume production. Key Features of the Test Cell Include: The fast automated photonic alignment with nine-axis nano-precision, delivering significantly higher throughput compared to other technologies. Full integration of FormFactor’s Velox probe station control and wafer-level measurement with Advantest’s V93000 test system. Wafer-level low-loss edge and surface coupling for photonic devices, with single-click automated calibration using FormFactor’s OptoVue and OptoVue Pro, enabling the fastest tool setup time. FormFactor’s Pharos optical probe technology achieves lowest coupling loss from the fiber to the device. Combines with FormFactor’s Apollo probe architecture for production proven volume test of optical and electrical devices. Superior instrumentation set for HPC/AI/data center devices within a proven manufacturing environment, using the leading ATE platform with Advantest’s V93000 test system. Tight integration of optical instrumentation into Advantest’s SmarTest 8 software platform. Together, these capabilities significantly shorten the time for opto-electrical testing and provide accurate, reliable measurements. The platform now also facilitates optical measurements through seamless integration with essential equipment, such as laser sources, power meters, and optical signal routing and control instruments.

Advantest Corporation, Board Meeting, Oct 30, 2024. Agenda: To consider acquisition of own shares.

Advantest Corporation expected to report Q3 2025 results on January 24, 2025. This event was calculated by S&P Global (Created on October 30, 2024).

Advantest Corporation (TSE:6857) announces a share repurchase program. Under the program, the company will repurchase up to 9,000,000 shares, representing 1.22% of outstanding shares for ¥50,000 million. The company will repurchase its shares for the purpose of shareholder returns, improving capital efficiency. The program will expire on February 26, 2025. As of September 30, 2024, the company had 739,338,424 shares in outstanding and 26,802,832 shares in treasury.

The Board of Directors of Advantest Corporation has authorized a buyback plan on October 30, 2024.

Advantest Corporation at its board meeting held on October 30, 2024 resolved interim dividend of JPY 19.00 per share for the year ending March 31, 2025, the company paid JPY 65.00 per share in the previous year. Record date is September 30, 2024. Effective Date is December 2, 2024.

Advantest Corporation, Q2 2025 Earnings Call, Oct 30, 2024

Advantest Corporation Presents at VOICE 2025 Developer Conference, May-12-2025 . Venue: AT&T Conference Center, Austin, Texas, United States.

Cloud Testing Service Inc, VOICE 2025 Developer Conference, May 12, 2025 through May 14, 2025. Venue: AT&T Conference Center, Austin, Texas, United States.

SEMI, SEMICON Korea 2025, Feb 19, 2025 through Feb 21, 2025. Venue: COEX Seoul, Seoul, South Korea.

Advantest Corporation announced that they will report Q2, 2025 results on Oct 30, 2024

Advantest Corporation Presents at SEMICON Taiwan 2024, Sep-05-2024 11:05 AM. Venue: Taipei Nangang Exhibition Center Hall 1&2, Taipei, Taiwan.

Advantest Corporation, Board Meeting, Jul 28, 2024. Agenda: To consider the Treasury Stocks based on Post-issued Restricted Stock Unit Remuneration Plan and Performance Share Unit Plan.

PDF Solutions, Inc., Executive Conference on the power of AI, Dec 12, 2024. Venue: St. Regis Hotel, San Francisco, California, United States.

Advantest Corporation, Board Meeting, Jul 31, 2024. Agenda: To revise its dividend per share forecast and changes in dividends forecast.

Advantest Corporation, ¥ 19.0, Cash Dividend, Sep-27-2024

Advantest Corporation Presents at Semicon West 2024, Jul-09-2024 through Jul-11-2024. Venue: The Moscone Center, Moscone South, Exhibition Level, Room 7, San Francisco, California, United States. Presentation Date & Speakers: Jul-11-2024, Bob Bartlett, Fangmin Chu, Ken Butler.

Advantest Corporation, Q1 2025 Earnings Call, Jul 31, 2024